Triple-level flash cells drive NAND flash boundaries. As the title implies, the triple-level NAND cell holds 3 bits of data per flash drive. NAND triple-level cell makes use of developments in geometries of the semiconductor process to give higher densities than planar NAND.
The disadvantage of the triple-level cell flash emerges from the higher error correction required to decode the signal crosstalk resulting from more bits per cell being processed. Triple-level cell SSDs have only made limited appearances as an enterprise flash technology to support high-volume reads.